Topic Four (1.4): A Detailed Look at the Fetch-Decode-Execute Cycle and Logic Gates
Objectives for this topic
By the end of this topic, you should be able to:
- describe the use of registers within the Fetch-Decode-Execute cycle;
- draw, describe and construct truth tables for AND gates.
You might also be able to:
- discuss how logic gates fit into computers.
Introduction
This topic rounds off the use of the little man computer with a discussion about registers. Registers are nothing special – they are just very small bits of memory, but their location on the CPU itself means they are extremely fast to access. Some are used as general temporary storage, and some do special jobs – but they are still just memory.
You are then introduced to your first logic gate. Logic gates are circuits which either output a high voltage or a low voltage (we write ‘1’ or ‘0’ for simplicity) depending on what the inputs are. By combining these, we can make logical decisions. Every single thing a computer does is based on the results of logic gates. You will first be introduced to the AND gate.
Working through your coursebook
Read pages 25—27 in your Computing Stage 9 book.
- Complete the Learn box on pages 25-27. Pay attention to how the registers change.
Read pages 27-30 in your Computing Stage 9 book.
- Make sure you understand the Learning Point on pages 27-28.
- Make sure that you understand the keywords described on pages 27 and 28. Add them to your cram.com Links to an external site. flashcards.
- Complete the Practise task on pages 29-30. You can access the spreadsheet here:
DOWNLOAD - Using Logic Gates Download DOWNLOAD - Using Logic Gates
Review
Reflect upon the pages you have just covered. In your notes, summarise:
- what you have learnt;
- what you already knew;
- what surprised you;
- what you are curious to know more about.
Support activity for this topic
Watch this video with a little more detail about the use of the registers in the Fetch-Decode-Execute cycle:
Extension activity for this topic
Watch this video for a more complex introduction to AND gates and OR gates (which you will be introduced to in the next topic):